While on the topic of novel memories, we might as well continue down this path, this time with a transistor-less memory cell designed for non-volatile memory products. Before delving into the memory cell details and the associated physics, a little info about the company, namely Unity Semiconductor, might be of interest. Based out of Sunnyvale, CA and founded in 2002, Unity Semiconductor emerged from stealth mode just about a month ago as it announced that it raised additional $22 million in Series C funding. This brings to total amount of funding that the company has received to a very respectable $75 million over the last few years, proving that an interesting idea in the semiconductor space will attract some serious money. The company was founded by Darrell Rinerson, Ed Ward and David Bostwick, all of whom seem to have had stints at some of the major semiconductor companies, including Micron and AMD. It is fairly unusual for a company to wait this long before existing stealth-mode, but just like with the device physics that took time to calculate, Unity Semi has also been calculative on how to penetrate the market and maintain control of their new conductive metal oxide and ionic motion (CMOx) technology. For this purpose, the company has amassed a war chest of patents before existing stealth-mode. How Many? How about in excess of 60 granted and another 90 applications currently pending, so feel free to knock yourself out examining them.

As mentioned before, the technology is targeted at the non-volatile memory (NVM) market which the company beliefs will grow to more than $25 billion by 2013. Currently, this market is being served by NAND flash technology; however there is a concern in the industry that NAND technology scaling might be reaching its limits. Hence, the recent spur in the development of new technologies that are to replace NAND flash including: resistive ram (RRAM), ferroelectric RAM (FeRAM), phase-change memory (PCM), magneto-resistive ram (MRAM), multi-chip packaging (MCP), and finally 3D-memory. Unity Semi briefly discusses the cons for each of these technologies in section 7 of this document. The company intends to tape-out a 64-gigabit product in the first half of 2010 and ramp up to volume production in the first half of 2011.

The figure above shows a cross section of the CMOx technology. On a high level, through the application of a high electric field across the tunnel oxide (TO) layer, the charge buildup in the tunnel oxide can be controlled which leads to a change in the trap-assisted tunnel current through the oxide, or in other words a change in the device resistance. If that just went over your head, you’re not the only one for sure; thankfully Unity Semiconductor has a presentation that discusses all of this in detail, including oxygen ion mobility and the associated memory effect. This is a very good presentation indeed and a detailed paper is included as well, so it is well worth your time. The company claims that the current difference between the two resistive states is approximately 10x and that the program and erase times are in the 1us range at +/-3V. Compared to flash NAND technology, Unity Semi is claiming a 4x density improvement and a 5 – 10x write speed improvement.

Overall, Unity’s technology is interesting and impressive at the same time, which explains why the company has been able to raise this much capital. The BEOL approach to commercialization, where the memory layer with CMOx technology is deposited on top of a regular CMOS logic layer by a secondary fab seems possible as well, although it will require a good partnership with an integrated device manufacturer (IDM). At the same time, NAND flash technology should not be written off too quickly. For years, people have predicted the end of transistor scaling due to various reasons, and yet the scaling continues and if you talk any of the major semiconductor players you will find them to be optimistic about being able to continue this trend for several process nodes to come. From published material it seems that the program vs. erase current is predicted to scale with device size, but it will be interesting to observe whether Unity Semi can maintain the 10x difference, especially as the technology is moved to next process nodes. On the flip-side, because of the BEOL approach, the company does not need to necessarily move to the latest and greatest process, since the CMOS logic layer is able to use a different process than the CMOx memory layer, which is a very nice option to have.

In February we briefly reviewed some of the emerging technologies listed by the MIT Technology Review, as pertaining to computing and electronics. One technology that we mentioned was Racetrack Memory, a technology that uses U-shaped magnetic nanowires in conjunction with a spin current to propagate magnetic patterns along the wire. It seems that since then MIT Technology Review has published a four minute video interview with Stuart Parkin, an IBM Research Fellow, discussing Racetrack Memory on a high level. It is a very nice little primer on this topic and might be of interest to anyone dealing with memory design and technology. The video embedded below is a much longer interview with Stuart as conducted by Fast Company TV. In this video, Stuart discusses Magnetic Memory, Racetrack Memory, and several other related things. A couple warnings about this video: The interviewer does not seem to really have a good handle on this topic, so bear through his less than stellar questions or attempts at humor, and wait for Stuart’s answers for they are a lot more interesting than the actual questions. Also, the audio volume in the interview is rather low, with the exception of the interviewer occasionally laughing hysterically directly into the microphone: a less than enjoyable experience. Nevertheless, the interview has some interesting content that might be of interest to some.

In April we discussed Nethra’s acquisition of Amric’s assets and what the future might hold for the products Ambric was developing. Shortly afterwards I received a ping from Nethra’s Senior Director of Business Development, Manu Pallai, to check their website in about a week for some updates. I have to admit I sort of dropped the ball on that one, and only recently got a chance to follow up with what Manu was alluding to. As it turns out, without as much as a press release, Nethra has now made available a whole slew of Ambric based development boards: the Am2045 GT, the AM2045 GT2, the Am2045 IDB, and finally the Am2045 GT2-SDI.

As the names imply, all of these boards are powered by the Ambric’s massively parallel processor arrays. All of these boards feature a PCIe interface and can be plugged directly into a regular system for easy development. The difference between the GT and GT2 is that the latter offers two Am2045 processors. The Am2045 IDB is a little bit more versatile and can be configured with a choice of processor arrays: Am2045, Am2029, and Am2016. It contains four 32-bit GPIO ports and an FPGA for custom logic. It also features a Serial Flash, a USB interface, and an ATX connector to expand the configuration options. The GT2-SDI is a reference design which adds a whole bunch of digital connectors and stream operations. The programming environment for these boards is the aDesigner Tool Suite and integrates Ambric’s structured object programming model (SOPM). We discussed the Am2045 and SOPM in more detail back in 2007 in this post. Nethra does not provide any pricing info for these development boards on their website at this time, but if they are reasonably priced I might have to pick one up just to have something this massively parallel to play with and possibly pit against a general purpose CPU.