back to the future, nanoelectromechanical switched capacitor

Having covered magnetoresistive random access memory (MRAM) on several occasions it is time to move on to something a little bit more exotic, namely nanotubes. The January issue of the Nature Nanotechnology Magazine contains a very interesting article titled: Nanoscale Memory Cell based on a Nanoelectromechanical Switched Capacitor. Unfortunately, unless you are a subscriber to the magazine or might have access to it through your company, you will not be able to access the full article. Thankfully, nanowerk.com has a pretty nice write-up on the article and even obtained permission to reprint several of the illustrations. Looking at these illustrations, it can be seen that the proposed device is a three terminal device consisting of a source, drain, and gate. The source and drain both contain vertical multiwalled carbon nanotubes (MWCNT). The nanotube on the source, which is grounded, is covered with a dielectric layer which in turn is covered with a metal layer, thus completing the capacitor. The drain terminal is connected to what in a conventional design would be a bit-line and the gate terminal is connected to what would be a word-line. The mechanical switching occurs when bias voltages are applied to the drain and gate terminals. That is, when a gate voltage is applied but no drain voltage is applied, nothing happens. However, when both drain and gate voltages are applied, such that the gate voltage is higher than the drain voltage, the nanotube on the drain is subject to a repulsive electrostatic force from the gate and bends towards the source. If it bends far enough it establishes contact with the metal layer of the source and charges the capacitor effectively storing a logical one in the bit-cell, hence the name nanoelectromechanical switched capacitor (NEM).

The authors of this paper have only implemented the writing portion so far, but according to the paper, reading from the bit-cell would follow a similar sequence with the exception that the nanotube on the drain would be unable to make contact with a bit-cell that contained a logical one since even though it would still experience an electrostatic force from the gate, it would also be subject to a counter force from the charged capacitor, and thus no current would flow from the capacitor to any current sensing circuitry. All of the above is just a brief summary, the article contains all the dimensions used for constructing the device, a detailed description of the manufacturing method, all the voltages and capacitance numbers, and of course a few equations for calculating the switching speeds and effective capacitances, and is therefore definitely worth a look if you have access to it. While all of this is very preliminary work, it is nevertheless very fascinating and only gives us a small glimpse of all the esoteric structures that circuit designers might get to play with in the coming years.