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plurality, beta HyperCore development tools now available
plurality, beta HyperCore development tools now available |
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| Written by Maciej Bajkowski | |
| Sunday, 09 November 2008 | |
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You can read Alan’s complete comment regarding our post here (below the article). In summary, there were no issues with the initial architecture, however, due to price, performance, size, and power requirements expressed by potential customers the company opted to use the 65nm processes instead of the 90nm process for the 64-core chip. So we were partially right about 90nm not being the right process node for what the company was attempting. Plurality also intends to use the 65nm process for the 256-core part. Unlike what management sometimes believes, taking a design from one process node and porting it to the next one is not exactly a walk in the park, as many an engineer will attest. As such, the new target dates for these processors are the second half of 2009 and 2010, respectively. An FPGA-based evaluation board featuring 32 cores should be available in Q2 of 2009. In addition to working on the processors themselves, Plurality has been busy optimizing their development tools. As mentioned above, the company has just released a beta version of their development tools which consists of a cycle-accurate simulator, a GCC cross-compiler and GNU Binutils, a cross-debugger which is compatible with the Eclipse development environment, and finally an emulator. The tools can be immediately downloaded free of charge over here, although a brief registration is mandatory. Additionally, Plurality is also developing acceleration boards featuring the HAL chips which can connect to the main CPU either via the PCI Express interface, or specifically to AMD processors, through a HyperTransport link via AMD’s Torrenza initiative. Good to see that Pluarity is making progress and given some spare time it would be interesting to take the development tools for a spin. |
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