TILE64, Tilera's 64 processor bombshell

The Hot Chips Symposium at Stanford’s University has barely kicked off and already we have a major bombshell from Tilera, namely their TILE64 multi-core processor.  We are not talking four or eight cores here but a whopping 64 full-featured identical cores, each with an integrated L1 and L2 cache, a distributed L3 cache, and an integrated non-blocking switch which is utilized to connect to the iMesh on-chip network.  The iMesh network is Tilera’s implementation of the grid architecture concept, with several enhancements of course, and allows the cores to communicate with each other as well as the main memory and the I/O. Since the cores are full-featured, each is capable of running an independent operating system. The general architecture of the TILE64 is shown in the illustration below.

Combined with a portfolio of 40 patents and the architecture described above, Tilera claims to be able to deliver 40X times the performance of the leading Texas Instruments DSP.  The TILE64 comes in several flavors running between 600MHz and 1GHz.  At these frequencies each core dissipates between 170 and 300mW, respectively.  Assuming the latter frequency, the chip would dissipate around 20 Watts without any of the peripheral circuitry or the network overhead. My guess is that the complete chip consumes at least 30 Watts, this however is pure speculation, since no average or maximum power dissipation numbers are available on Tilera’s website. Also missing from the website are the chip dimensions and the manufacturing node that is currently being utilized – two metrics that are of most interest to designers.

As discussed in previous posts, a multi-core chip is nothing without a good development environment that allows the programmer to take advantage of all the resources. Not to be outdone by other startups in the multi-core race, Tilera offers a Multicore Development Environment (MDE) that is based on the open-source Eclipse IDE, an ANSI C compiler, and a full system simulation model.  There are plans for the environment to support C++ soon as well.  In the meantime, the MDE enables developers to for example cluster cores, such that a particular application can obtain enough processing power. Of course, all this processing power and flexibility does not exactly come cheap, starting at $435 in 10K quantities. There are also plans for a 120 core device and a 36 core device, so we will definitely be hearing more from Tilera in the near future.