SiliconBlue, Low-Power Programmable Solutions

When considering the consumer handheld market, one might not usually think of it as a segment that might be well served by a programmable device, such as a field-programmable gate array (FPGA). One reason being that FPGAs are usually produced using processes that are about a couple of generations behind the leading edge. This in turn makes these chips large and expensive, and thus not very suitable for markets were margins are razor thin. However, assuming that this problem can be overcome, suddenly FPGAs become a viable option, especially for applications that might require frequent upgrades due to ever changing standards. Enter SiliconBlue Technologies, a Sunnyvale, California based startup which claims to be the first company that has managed to combine non-volatile memory (NVM) and static RAM (SRAM) at the 65nm process node on a single chip. Unlike purely SRAM based FPGAs that require an external PROM to store the programming bit-stream, and have a configuration penalty, the SiliconBlue iCE family of devices can be turned on instantly. Additionally, since no bit-stream programming is necessary, there is also no danger of bit-stream snooping during the configuration process.  On the other hand, compared to purely NVM based devices, the iCE family is significantly smaller due to smaller SRAM geometries.

The current iCE 65nm family consists for four devices: iCE65L02, iCE65L04, iCE65L08, and iCE65L16, which contain from 1,792 to 15,260 logic cells. The current for the iCE chip family ranges from 25 to 250-uA at 32-KHz, and from 5 to 40-mA at 32MHz. The BGA packages for these devices range from 3x4 to 12x12 mm. Programming is performed in a similar manner to SRAM based FPGAs. The SiliconBlue chips are also available in DiCE packages to allow vendors to combine them with existing chips through multi-chip system-in-package (SiP) technology. Samples are available now and SiliconBlue also offers an iCEMAN evaluation board that features the iCE65L04 and iCECUBE development software.

The combination of NVM and SRAM definitely seems appealing, as well as the low-power consumption and package size. However, the FPGA space is a tough business and it is hard to tell whether SiliconBlue will flourish or fold. Many companies including Quicksilver, Adaptive Silicon, PlusLogic, and Chameleon, just to name a few, have tried taking on the industry big boys Altera and Xilinx, and have either failed or been absorbed. In SiliconBlue’s defense, the fact that company has been able to combine NVM and SRAM on a standard low-power CMOS process in 65nm, and claims to have a solid roadmap towards 45nm, might just give it the edge to stay ahead of the competition.