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Tilera, cores gone wild

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Written by Maciej Bajkowski   
Wednesday, 07 July 2010

tilera.com We first encountered Tilera back in '07 when the company made the EETimes emerging startup list. We caught up with the company later that year when they revealed the Tile64 processor. The following year the Global Semiconductor Alliance (GSA) recognized Tilera with the startup to watch award. Over the last couple of years Tilera has definitely not been standing still nor resting on their laurels. In '09 they announced the Tile-Gx family of processors, which features devices that range from a relatively humble 16 cores to a massive 100 cores. These devices also go a step further than the company’s previous efforts in terms of system on a chip (SOC) design integrating 64-bit DDR3 interfaces, plenty of Gigabit-Ethernet (GbE) MAC interfaces and hardware encryption and compression support. A high-level view of the Tile-Gx is shown in the figure below. Tilera expects to start sampling these devices, implemented in 40nm technology, later this year. Further out, in the 2013 timeframe, Tilera expects to offer a 200-core processor version, codenamed Stratton, which will be implemented in 28nm technology.

TILE-Gx Processors Family

All this progress has not gone unnoticed and earlier this year the company received an additional $25 million in series-C funding, bringing the total venture capital raised to $64 million. Several new strategic investors joined in this round, including Broadcom, Quanta Computer and NTT Financing. The newly raised capital is to be used to broaden the product portfolio and to expand sales activities. With Quanta as an investor the company also went to town on branching out into the cloud computing space. In June the two companies jointly announced a new Quanta cloud server product that packed a stunning 512 cores into a single 2U form factor server while staying under 400 watts. This particular product featured the TilePro64 processors, however, with the future Tile-Gx and Stratton products, companies could potentially offer 20,000 cores per server rack in 2011, and up to 40,000 cores par rack by 2013, respectively. These are mind numbing numbers indeed; it will be interesting to see how Tilera’s proprietary Dynamic Distribute Cache (DDC) which allows for a fully coherent shared cache across an arbitrary array of tiles (processor + switch), as well as the Intelligent Mesh (iMesh) non-blocking cut-through network will scale with the ever increasing core count. With Tilera’s ambitious roadmap and the recent announcement from startup SeaMico touting a 512 processor Intel Atom based product, the server space has suddenly become very interesting again.

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Akya, the art of dynamic reconfiguration

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Written by Maciej Bajkowski   
Wednesday, 09 June 2010

akya.co.ukAchieving maximum performance from your design given constraints such as area and power has been name of the game for a while now. Over the last few years we have seen quite a few approaches to this problem: On the one hand, there have been startups that have ventured down the massively parallel architecture route and then wrote sophisticated tools and compilers that mapped software and programs onto those architectures. Companies such as Ambric and Plurality come to mind - the former has since hit the dead pool while the latter has been strongly marching on. On the other hand, there are companies which have approached the problem from a different angle, focusing on reconfigurable silicon that can be optimized for a given program or task. Companies such as Tabula and their programmable spacetime architecture come to mind. Akya, a startup out of Selby, United Kingdom, which has been developing what it refers to as Akya Reconfigurable Technology (ART), definitely falls into the latter camp.

Akya recently introduced ART2 which is a dynamically reconfigurable logic technology primarily aimed at digital processing functions. ART technology can be used for a whole chip or just parts of a chip where it is needed. The major advantage touted by Akya is the flexibility that ART offers, allowing designs to be modified after tape-out without requiring new silicon while at the same time delivering area and power comparable to hard-wired silicon solutions. The basic building block of the ART architecture is a Reconfigurable Processing Matrix (RPM) as shown in the figure below.

Akya Technology

The RPM is composed of Processing Elements (PEs) which are connected by a reconfigurable interconnect (RI). The PEs are selected at design time from the supplied ART2 library, which includes many functional blocks for arithmetic and memory operations amongst others. The Sequencer element is responsible for running a program which defines which operations are performed by the individual PEs and which registers are loaded. The datapath in the RPM can be re-configured each clock cycle. Several RPMs can then be connected together at a higher level via a token ring network to implement the desired functionality, which in turn is controlled via a master controller. Akya splits the design process into two phases: datapath design and control design. The dynamic datapath is developed using the ART Architecture Definition Language (AAD), which is consumed by the ART Architecture Compiler (ARTAC) to generate fully synthesisable Verilog and SystemC collateral. The control functionality is implemented via code using the ART Assembly Language (AAL), which is utilized by the ART Assembler (ARTASM) to generate a bit-stream to be loaded into the device at power-on. If nothing else, Akya has definitely furnished us with plenty of acronyms! The design tools currently support the Artisan libraries down to TSMC 90nm node, as well as the Altera Stratix II FPGA.

As mentioned beforehand, the biggest benefit of the ART2 technology seems to be flexibility. For example, the control firmware can be modified to support slight product variations with the same silicon or it can be updated to fix a few bugs in the field. It could also come in handy when evolving standards get updated and equipment in the field needs to be modified accordingly. Another interesting application is the possibility of combining several low volume devices into one product thus amortizing the development and production costs across these products. It will be interesting to see if Akya's technology finds a home in a few designs in the marketplace.  ART2 definitely looks interesting, but interesting alone does not pay the bills. On that note, if you are absolutelly convinced that the company is on to something and you want to put your money where your mouth is, privately held Akya is actively seeking investors so ping them if so inclined.

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Shocking Technologies, ESD protection through VSD

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Written by Maciej Bajkowski   
Thursday, 22 April 2010

shockingtechnologies.com We first covered Shocking Technologies at the beginning of 2008, when the company raised $4M in venture funding from Hercules Technology Growth Capital. Back then, very little information was available regarding what the company was pursuing, other than that it had something to do with conductive dielectrics. As it turns out, our guess that that company might be looking into electrostatic discharge (ESD) protection was right on. The conductive dielectric has been rebranded into a Voltage Switchable Dielectric (VSD) material, which the company defines as a “polymer nano-composite that behaves like an insulator (dielectric) during normal circuit operation and becomes conductive when the voltage across the VSD material increases beyond a predefined threshold voltage. The VSD material becomes an insulator again after the voltage drops below the threshold voltage.” The figure below shows the embedding of the VSD material such that it is in contact with the ground plane in the design.

VSD Technology

Since the VSD material is embedded throughout the substrate, regardless where the high static charge enters and a high voltage pulse occurs, the excess current is shunt to ground within a nanosecond, according to Shocking Technologies. The VSD material can be integrated within a printed circuit board (PCB) to offer board level protection, or as mentioned beforehand, into the substrate in order to provide package level protection. Cell phone, portable electronics, memory device, and semiconductor companies have expressed interest in the technology recently according to company. Viking Modular Solutions introduced a CF card just the other week featuring VSD technology and it seems the investor community has taken notice as well, allowing Shocking Technologies to raise $13.2M in Series-B funding at the beginning of this month. With money in hand the company intends to expand rapidly, increasing its staff by 33% over the next few months and by over 50% over the course of a year - so if you’re looking for a job with an exciting startup now would be the time to apply.

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